The present invention relates in general to broadband signal switching equipment using crosspoint technology. Recent developments in telecommunications technology have led to integrated services communications transmission and switching systems for narrowband and broadband communications services in which light waveguides are used as a transmission medium in the region of the subscriber lines. Both the narrowband communications services such as 64-Kbit/s digital telephony as well as broadband communications services such as, 140Mbit/s picture telephony, are conducted via these light waveguides. In prior art systems narrowband signal switching equipment and broadband signal switching equipment are provided side-by-side (as disclosed in German Patent No. 24 21 002) in the switching centers and preferably have shared control equipment.
In conjunction with broadband signal time-division multiplex switching equipment whose crosspoints are utilized in time-division multiplex for a plurality of connections, it is known to connect two lines by a gate element that is switched on and off by a cross point-associated memory cell. The memory cell may be a bistable D-trigger element, whereby this crosspoint-associated memory cell having a clock input supplied with a corresponding clock signal is driven in only one coordinate direction, namely at its D-input (see Pfannschmidt, "Arbeitsgeschwindigkeitsgrenzen von Koppelnetzwerken fuer Breitband-Digitalsignale", Diss., Braunschweig 1978, FIG. 6.7 as well as FIG. 6.4). In view of a time-division multiplex factor of about 4 through 8 which is achievable for a bit rate of 140 Mbit/s and in view of the complex circuit technology required, pure space division switching equipment are currently preferred for switching broadband signals. The connections formed by the individual crosspoints are separated only spatially from one another therein.
A pure broadband signal space division switching matrix network can be fashioned as a crosspoint network in CMOS technology provided with input amplifiers and output amplifiers, the switching elements in the crosspoints thereof being controlled by a decoder-controlled, crosspoint-associated storage memory cell, whereby the switching elements are fashioned as CMOS transfer gates (&lt;for example see&gt; CMOS transmission gates; ISS'84 Conference Papers 23Cl, FIG. 9). The crosspoint-associated storage memory cells of a pure space division switching matrix can be driven in two coordinates via a row-associated and a column-associated selection line connected to a row decoder and connected to a column decoder (for example see Pfannschmidt, op. cit., FIG. 6.4).
In broadband signal space coupling equipment having a crosspoint matrix using FET technology device, the switching elements can be formed with n-channel-,1 transistors having their drain-source path connected between a matrix input line and a matrix output line (also see ISS'84 Conference Papers 31.C.3, FIG. 12). Each of these n-channel transistors are controlled by a cross-point-associated memory cell that is driven in two coordinates by two selection decoders. The elements have two cross-coupled inverter circuits wherein one of the inverters has its input side connected to an inverting decoder output of one selection decoder via a first n-channel transistor and wherein the other of the inverters has its input side connected to a non-inverting decoder output of the same selection decoder via a second n-channel transistor. Both n-channel transistors in turn have their control electrode receiving an output signal of a connected decoder output of another selection decoder (see Rev. ECL 25 (1977) 1-2, 43...51, FIG. 1; IEE J. of Solid-State Circuits SC-9 (1974) 3, 142...147, FIG. 1(a); Electronics and Communications in Japan, 53-A (1970) 10, 54...62, FIG. 5(b); and EP-A-0 073 920, FIG. 4). Every writing of such a known memory cell requires that a write current having a defined magnitude be applied for a defined time, this producing corresponding losses in writing performance and rewriting durations.
Compared thereto, it is an object to the present invention to provide in a broadband switching equipment individual crosspoint-associated memory cells which have low dissipated writing power and short switching times.